Why AI chipmakers are testing glass beneath the silicon

An AI chip package is also a wiring problem. Several pieces of silicon must exchange information through densely packed connections, while the structure beneath them stays flat and stable through manufacturing. Glass is being developed as that underlying substrate.[1]

Intel’s September 2023 research announcement described glass as a way to reduce distortion and increase the density of connections compared with organic substrates. The attraction is physical: greater dimensional stability helps engineers align successive wiring layers and assemble larger groups of chiplets. The material changes the foundation supporting the package’s connections.[1]

Put the wiring on—and through—the glass

SCHOTT’s current glass-panel specifications make the manufacturing task more tangible. Its panels support fine copper lines on the surface and laser-made through-glass vias: passages that allow connections through the substrate. The supplier also describes openings for embedding active and passive components. A useful substrate needs routes between layers as well as room on its face.[2]

The glass itself is selected for the package. SCHOTT offers different thermal-expansion properties to suit the other materials assembled with it. Its listed panel format is 510 by 515 millimetres, with initial thicknesses of 0.5–1.1 millimetres. These are material and manufacturing specifications; they do not report the speed of a completed AI processor.[2]

A layout can be exquisitely drawn and still be difficult to manufacture if its layers do not line up. That is why flatness and dimensional stability belong in the computing story: they affect the structure in which the electrical connections must be made.[1]

Some components can move inside

Absolics, the US glass-substrate business backed by SKC, is developing another use for that space. SK’s account describes embedding multilayer ceramic capacitors inside the glass core, in place of mounting them on the surface. It says this shortens routing and frees surface area for processors and memory.[3]

This makes the substrate part of the package’s architecture. Engineers can decide where supporting components sit and how their connections reach the chips. SK presents the resulting space and routing benefits as features of its technology; it does not establish a universal energy saving for every AI server using glass.[3]

The next factory milestone is qualification

Money is now supporting the work between a sample and a repeatable product. On 22 September 2026, SKC said an additional subscription would bring its participation in Absolics’ rights offering to about 373.1 billion won. The subsidiary was advancing both products with embedded components and products without them.[4]

SKC said embedded samples from the Georgia plant had completed preliminary evaluations and entered reliability testing. The non-embedded programme was still involved in customer supplier selection, with proof-of-concept work being prepared for year-end. Those dated milestones describe the commercial work still under way.[4]

The investment therefore supports more than producing a promising piece of glass. Customers need a package that meets their requirements consistently. The commercial prize is the ability to supply that dependable foundation repeatedly, beneath chips whose usefulness depends on all those small connections.[4]

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