Tested transistors keep working after a hafnia memory layer is added

Researchers at ETH Zurich report adding hafnia-based memory to finished 180nm commercial chips, with the tested transistors still functioning. Their 27 October preprint tackles a practical obstacle: crystallising the memory requires heating the circuitry underneath. Electrical pulses switch ferroelectric domains to change the memory’s resistance.[1]

An analogue memory stores a neural network’s weight as conductance: how readily current flows. Apply voltages representing inputs across an array and the resulting currents add into a weighted sum. Changing those conductances is therefore part of teaching the network. This principle underpins a separate 2020 study of mixed-precision training with phase-change memory.[2]

The hafnia team heated two processed dies to 500°C for 60 seconds and compared their transistors with an untreated reference die. Shorter transistors showed up to about 6% lower saturation current; initial differences between dies were unmeasured. For three memories annealed at 450°C, high and low resistance values moved closer during two hours of storage.[1]

Hotter processing made weight updates more gradual. MNIST handwriting simulations, holding variability assumptions fixed, averaged 69% accuracy at 450°C and 82% at 500°C across three training runs with analogue updates. Mixed-precision training reached 97% at both temperatures. These were simulations; integrated transistor-memory cells await characterisation.[1]

The earlier phase-change study shows the logic of that division. A digital unit keeps a precise running total of the small changes requested during learning. Only when that total reaches a practical conductance adjustment does it send programming pulses to the memory, retaining the remainder. The analogue array performs weighted sums; digital arithmetic preserves small updates that the memory cannot reliably express one pulse at a time.[2]

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