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Nvidia and Cisco are redesigning the plug at the front of an AI network

The proposed USFP module promises more capacity in an existing footprint. Its connector design preserves a familiar operational advantage: replacing one optical module.

Nvidia and Cisco announced plans for USFP on 12 October: a removable optical module in an OSFP-sized footprint. Its two-step connector engages high-speed contacts after insertion, aiming to limit wear and improve the signal.[1]

The design addresses a practical question: how far can AI networks grow while keeping optics individually replaceable? Cisco presents pluggable modules as a continuing choice alongside more closely integrated alternatives.[2]

Where the signal becomes light

An optical network still contains electrical journeys. In a conventional pluggable arrangement, data leaves the switching chip, travels across a circuit board and through connectors, then reaches the module that converts it into light. At high signalling rates, losses along that route create work for the electronics that recover the signal.[4]

Co-packaged optics moves conversion beside the switching chip. Pluggable modules keep it in a separately removable part. The choice affects both the electrical distance and the maintenance boundary.[4][2]

OSFP, the existing module family used as the size reference, has eight electrical lanes. Its industry agreement defines much more than a metal shell: it covers the module, cage, electrical interface and pinout. Two devices occupying similar space need not be interchangeable.[3]

The fourfold increase has two ingredients

Cisco’s first planned arrangement uses 16 lanes at 400 Gb/s each. A future 32-lane version doubles that capacity. The table separates those two stages.[2]

Specifications

Electrical lane capacity: current format and proposed designs

Electrical lane capacity: current format and proposed designs
ConfigurationLanes × rate per laneNominal capacity
OSFP at 200 Gb/s per lane8 × 200 Gb/s1.6 Tb/sSource 3
First planned USFP16 × 400 Gb/s6.4 Tb/sSource 2
Future 32-lane USFP32 × 400 Gb/s12.8 Tb/sSource 2

Doubling the number of lanes and doubling their rate produces the fourfold increase over a 1.6 Tb/s configuration. It does not establish that a training job will run four times faster: that would require the rest of the network and the workload to benefit from the extra capacity.

The companies target about 1.3 times the power efficiency. At matched throughput, that means roughly 23% less energy per bit: 1 ÷ 1.3 ≈ 0.77. No equivalent reduction is established for a whole data centre’s electricity bill.[1]

The connector is part of the product

USFP uses a two-dimensional contact array and targets dissipation of up to 100 watts without a dedicated cooling circuit inside the transceiver. The surrounding system would still have to remove that heat.[1]

This does not turn the industry into a choice between entirely repairable and entirely sealed optics. Nvidia’s own co-packaged designs include socketed optical assemblies in one platform, soldered assemblies in another, and field-replaceable external laser modules. Integration moves maintenance boundaries; it does not make them disappear.[5]

TE Connectivity and Amphenol are helping develop the hardware. An open, multi-source specification is planned; the announcement gives no shipment date.[1]

For operators, the eventual test is physical: adding or replacing a module with enough space, cooling and access available in the surrounding switch.

Follow the evidence

Sources & further reading

  1. USFP design announcement NVIDIA and Cisco · 12 Oct 2026 · Accessed 18 Oct 2026
  2. Cisco and NVIDIA Announce USFP: Expanding the Path to AI Connectivity Bill Gartner and Will Eatherton / Cisco · 12 Oct 2026 · Accessed 18 Oct 2026
  3. Scaling AI Factories with Co-Packaged Optics for Better Power Efficiency Ashkan Seyedi / NVIDIA · 18 Aug 2025 · Accessed 18 Oct 2026
  4. How Industry Collaboration Fosters NVIDIA Co-Packaged Optics Ashkan Seyedi / NVIDIA · 26 Aug 2025 · Accessed 18 Oct 2026